FIGS. 7A to 7C illustrate a conventional non-contact IC card, and FIG. 8 shows the waveforms of various signals generated by the IC card. (The conventional IC card is described in Japanese Patent Application Laid-Open No. 6-325229).
As shown in FIG. 7A, the IC card comprises an input antenna 701, a rectifier circuit 702, a clock input circuit 703, a detector circuit 704, a voltage controlled oscillator ("VCO") 706, a response signal generator circuit 707, a carrier wave generator circuit 708, a modulator circuit 709, and an output antenna 710. The input antenna 701 receives an input signal 801 (FIG. 8) from a card reader (not shown) and outputs the input signal 801 to the rectifier circuit 702, the clock input circuit 703, and the detector circuit 704.
The rectifier circuit 702 generates a supply voltage used by the various components of the IC card based on the input signal 801. The detector circuit 704 demodulates the data contained in the input signal 801 to produce a demodulated data signal and supplies the demodulated data signal to the internal circuitry of the IC card. Also, the clock input circuit 703 generates a base clock based on the carrier signal of the input waveform 801 and supplies the base clock to the internal circuitry of the IC card to synchronize various operations of IC card.
The supply voltage generated by the rectifier circuit 702 is also provided to the VCO 706, and the VCO 706 generates an oscillation signal which has a frequency that is proportional to the supply voltage. The response signal generator circuit 707 inputs the oscillation signal and generates a response signal based on the frequency of such signal. The carrier wave generator circuit 708 generates a carrier wave, and the modulator circuit 709 superimposes the response signal on the carrier wave to produce an output signal. Then, the output signal is transmitted via the output antenna 710.
FIG. 7B shows one example of the configuration of the clock input circuit 703. As shown in the figure, the circuit 703 contains two inverters 7031 and 7032. The inverter 7031 inputs the input signal 801 from the input antenna 701 and inverts such signal 801 to generate an inverted signal 802. The inverter 7032 inputs the inverted signal 802 and inverts such signal to generate the base clock signal 803.
FIG. 8 shows the detailed configuration of the input signal 801. The signal 801 has a first interval A and a second interval B which follows the first interval A. During the first interval A, the input signal 801 has a large amplitude and defines a high voltage input interval (i.e. defines a logic "1"). During the second interval B, the input signal 801 has a small amplitude and defines a low voltage interval (i.e. defines a logic "0"). The signal 801 is inverted by the inverter 7031 to produce the signal 802. In other words, the signal 802 is sampled at the point B7 in FIG. 7B. Since the supply voltage for the inverter 7031 is supplied from the rectifier circuit 702, a high level voltage output from the inverter 7031 equals the voltage of the supply voltage.
Then, the signal 802 is inverted by the inverter 7032 to produce the signal 803. In other words, the signal 803 is sampled at the point C7 in FIG. 7B, and the signal 803 is output as the base clock.
FIG. 7C shows another example of the configuration of the clock input circuit 703 illustrated in FIG. 7A. The clock input circuit 703 in FIG. 7C is the same as the clock circuit 703 shown in FIG. 7B except that it comprises a capacitor 7033 and transistors 7035 and 7036 inserted between the antenna 701 and the inverter 7031. The capacitor 7033 serves as a protector circuit, and transistors 7035 and 7036 serve as a clamp circuit. The protector circuit and clamp circuit are used to protect the transistors in the inverter 7031 in the clock circuit 703. Specifically, in order to increase the range of at which the IC card can communicate with the card reader, the input signal 801 output from the card reader is designed to have a high voltage. However, as the transistors in the IC card are miniaturized, the dielectric strength of transistors is lowered, and thus, the transistors must be protected from the high voltage.
The capacitance of the capacitor 7033 lowers the voltage of the received input signal 801 but is selected to have a value such that the voltage can be sensed by the inverter 7031 even when the input signal 801 has a low voltage (i.e. even when the interval B of the signal 801 is being transmitted). If a voltage which is higher the sum of the threshold voltage of the P type transistor 7035 and the supply voltage 7034 is input to the clamp circuit, the transistor 7035 is turned on and clamps the voltage at the point A7 at the supply voltage 7034. Also, if a voltage which is lower than sum of the threshold voltage of the N type transistor 7036 and the voltage of ground ("GND") 7037 is input to the clamp circuit, the transistor 7036 turns on and clamps the voltage at the point A7 at the voltage of GND 7037. Thus, the signals 802 and 803 having the waveforms shown in FIG. 8 can be respectively output from the inverters 7031 and 7032 without applying high voltage to the input of the inverter 7031.
Even though the clock input circuit 703 functions properly without applying a high voltage to the inverter 7031, it has several disadvantages. For example, since the clamp circuit contained in the clock input circuit 703 consumes a lot of power, the clock input circuit 703 does not efficiently use the limited power obtained by rectifying the data signal received from the card reader (not shown). Also, since the circuit 703 needs to consume a lot of power from the input data signal, the communication range between the card reader (not shown) and the IC card is shortened.